M41T00AUD datasheet(13/42 Pages) STMICROELECTRONICS

13 / 42 page

M41T00AUD

Operation

Doc ID 13480 Rev 5

13/42

4.2

Characteristics

4.3

READ mode

In this mode, the master reads the M41T00AUD slave after setting the slave address (see

Figure 8). Following the WRITE mode control bit (R/W = 0) and the acknowledge bit, the

word (register) address An is written to the on-chip address pointer. Next the START

condition and slave address are repeated, followed by the READ mode control bit (R/W = 1).

At this point, the master transmitter becomes the master receiver. The data byte which was

addressed will be transmitted and the master receiver will send an acknowledge bit to the

slave transmitter. The address pointer is only incremented on reception of an acknowledge

bit. The device slave transmitter will now place the data byte at address An+1 on the bus.

The master receiver reads and acknowledges the new byte and the address pointer is

incremented to An+2.

This cycle of reading consecutive addresses will continue until the master receiver sends a

STOP condition to the slave transmitter.

An alternate READ mode may also be implemented, whereby the master reads the

M41T00AUD slave without first writing to the (volatile) address pointer. The first address

that is read is the last one stored in the pointer (see Figure 10).

Table 3.

AC characteristics

Symbol

Parameter(1)

Valid for ambient operating temperature: TA = 0 to 70 °C; VCC = 3.0 to 3.6 V (except where noted).

Min

Typ

Max

Units

fSCL

SCL clock frequency

400

kHz

tLOW

Clock low period

1.3

µs

tHIGH

Clock high period

600

SDA and SCL rise time

300

SDA and SCL fall time

300

tHD:STA

START condition hold time

(after this period the first clock pulse is generated)

600

tSU:STA

START condition setup time

(only relevant for a repeated start condition)

600

tSU:DAT

(2)

Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling

edge of SCL.

Data setup time

100

tHD:DAT

Data hold time

µs

tSU:STO

STOP condition setup time

600

tBUF

Time the bus must be free before a new

transmission can start

1.3

µs

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