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L99ASC03TR 데이터시트(PDF) 64 Page - STMicroelectronics |
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L99ASC03TR 데이터시트(HTML) 64 Page - STMicroelectronics |
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64 / 73 page ![]() ST-SPI Protocol L99ASC03 64/73 DocID023504 Rev 7 4.4.12 Device Status Registers 3 Device Status Registers 3 Address: 0x13 Type: R/C 4.4.13 Device Status Registers 4 Device Status Registers 4 Address: 0x14 Type: R/C 7 6 5 4 32 10 WDF(3) WDF(2) WDF(1) WDF(0) FSWD WD75% WD50% WD25% GSB reported Information FS Information Information Information Clear mode Auto cleared with valid WDTRIG toggle Read & Clear — — — Bit Bit description [7:4] WDF: watchdog fault counter [3] FSWD: watchdog fault occurred [2:0] WD: counter monitor (these bits represent the percentage of the time elapsed between the POR or the last watchdog trigger and the end of the watchdog period) 76 54 32 10 — VDDR(2) VDDR(1) VDDR(0) — TSD2 TSD1/TW2 TW1 GSB reported Information — FS DE/GW(1) 1. Depending on TEMPM bit If TEMPM = 0, then DE If TEMPM = 1, then GW GW Clear mode Read & Clear on any of the VDD_R(x) bits — Read & Clear Read & Clear Read & Clear Bit Bit description [7] Reserved [6:4] VDDR: thermal shutdown event counter [3] Reserved [2] TSD2 detected [1] TSD1/TW2 detected [0] TW1 detected |
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