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SN74LVC2G17DBVT 데이터시트(PDF) 10 Page - Texas Instruments

부품명 SN74LVC2G17DBVT
상세설명  SN74LVC2G17 Dual Schmitt-Trigger Buffer
PDF  34 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
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SN74LVC2G17DBVT 데이터시트(HTML) 10 Page - Texas Instruments

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–100
–80
–60
–40
–20
0
20
40
60
–1
–0.5 0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
TA = 25°C, VCC = 3 V,
VIH = 3 V, VIL = 0 V,
All Outputs Switching
VOH – V
VOL – V
–20
0
20
40
60
80
100
–0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
TA = 25°C, VCC = 3 V,
VIH = 3 V, VIL = 0 V,
All Outputs Switching
SN74LVC2G17
SCES381N – JANUARY 2002 – REVISED JANUARY 2015
www.ti.com
Typical Power Button Circuit (continued)
10.2.3 Application Curves
Figure 6. Output Current Drive
Figure 5. Output Current Drive
vs LOW-level Output Voltage
vs HIGH-level Output Voltage
11 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions table.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1
μF capacitor is recommended. If there are multiple VCC terminals then 0.01 μF or 0.022 μF
capacitors are recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject
different frequencies of noise. Multiple bypass capacitors may be paralleled to reject different frequencies of
noise. The bypass capacitor should be installed as close to the power terminal as possible for the best results.
12 Layout
12.1 Layout Guidelines
When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of
digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,
or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states.
Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic
devices must be connected to a high or low bias to prevent them from floating. The logic level that should be
applied to any particular unused input depends on the function of the device. Generally they will be tied to GND
or VCC, whichever makes more sense or is more convenient.
10
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Product Folder Links: SN74LVC2G17



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