NOTES: (continued)

4.

This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments

literature number SLUA271 (www.ti.com/lit/slua271)

.

5.

Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their

locations shown on this view. It is recommended that vias under paste be filled, plugged or tented.

EXAMPLE BOARD LAYOUT

4219125 / A 10/2016

www.ti.com

WQFN - 0.8 mm max height

RTJ0020D

PLASTIC QUAD FLATPACK - NO LEAD

LAND PATTERN EXAMPLE

SCALE: 20X

20X (0.6)

(3.8)

(0.5)

TYP

SYMM

20

SYMM

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

SOLDER MASK

DEFINED

METAL

SOLDER MASK

OPENING

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)

2.7)

(R0.05)

TYP

VIA

15

(1.1)

TYP

16

11

6

10

1

5

(3.8)

21

20X (0.24)