f

(GSCLK) +

4096

f

(update)

f

(SCLK) +

193

f

(update)

n

TLC59401

SIN

SOUT

OUT0

OUT15

SCLK

GSCLK

XLAT

TEST

BLANK

IREF

XERR

MODE

TLC59401

SIN

SOUT

OUT0

OUT15

SCLK

GSCLK

XLAT

TEST

BLANK

IREF

XERR

MODE

IC0

ICn

6

SIN

SCLK

GSCLK

XLAT

BLANK

XERR

MODE

Controller

SOUT

100k

100nF

V(LED)

V(LED)

V(LED)

V(LED)

VCC

100nF

VCC

VCC

VCC

VCC

TLC59401

SBVS137 – DECEMBER 2009

www.ti.com

When using Equation 10 with very high GSCLK frequencies and very low grayscale PWM values, the resulting

T_on-time may be negative. If T_on is negative, the output does not turn on. For example, using f(GSCLK) = 30

MHz, GSn = 1, and the typical ton_err = 50 ns, Equation 10 calculates that OUTn turns on for –16.6 ns. This

output may not turn on under these conditions. Increasing the PWM value or reducing the GSCLK clock

frequency ensures turn-on.

SERIAL DATA TRANSFER RATE

Figure 22 shows a cascading connection of n TLC59401 devices connected to a controller, building a basic

module of an LED display system. There is no TLC59401 limitation to the maximum number of ICs that can be

cascaded. The maximum number of cascading TLC59401 devices depends on the application system.

Equation 11 calculates the minimum frequency needed:

(11)

where:

f(GSCLK): minimum frequency needed for GSCLK

f(SCLK): minimum frequency needed for SCLK and SIN

f(update): update rate of whole cascading system

n: number cascaded of TLC59401 device

APPLICATION EXAMPLE

Figure 22. Cascading Devices

22

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