8.2.3 Application Curve

One important aspect of power-stage design is the effective detection of an overcurrent condition to protect the

switching devices and passive components from damage. To power off the system quickly in the event of an

overcurrent condition, the isolated amplifier is required to have low signal delay. Figure 8-4 shows the typical

full-scale step response of the AMC0x00D.

0

5

10

15

20

25

30

35

40

45

50

Time (µs)

-1

-0.5

0

0.5

1

1.5

2

2.5

3

VINP

VOUTP

VOUTN

G087

Figure 8-4. Step Response of the AMC0x00D

8.3 Best Design Practices

Place a minimum 10nF capacitor at the device input (from INP to INN). This capacitor helps avoid voltage droop

at the input during the sampling period of the switched-capacitor input stage.

Do not short GND1 to INN directly at the device input. For best accuracy, route the ground connection as a

separate trace that connects directly to the shunt resistor. See the Layout Example section for more details.

Do not leave the inputs of the AMC0x00D unconnected (floating) when the device is powered up. If the device

inputs are left floating, the input bias current potentially drives the inputs to a positive value that exceeds the

operating common-mode input voltage. This condition causes the device to output the fail-safe voltage described

in the Analog Output section.

Connect the high-side ground (GND1) to INN, either by a hard short or through a resistive path. A DC current

path between INN and GND1 is required to define the input common-mode voltage. Do not exceed the input

common-mode range specified in the Recommended Operating Conditions table.

8.4 Power Supply Recommendations

In a typical application, the high-side power supply (VDD1) for the AMC0x00D is generated from the low-side

supply (VDD2) by an isolated DC/DC converter. A low-cost option is based on the push-pull driver SN6501 and a

transformer that supports the desired isolation voltage ratings.

The AMC0x00D does not require any specific power-up sequencing. The high-side power supply (VDD1) is

decoupled with a low-ESR, 100nF capacitor (C1) parallel to a low-ESR, 1μF capacitor (C2). The low-side power

supply (VDD2) is equally decoupled with a low-ESR, 100nF capacitor (C3) parallel to a low-ESR, 1μF capacitor

(C4). Place all four capacitors (C1, C2, C3, and C4) as close to the device as possible. Figure 8-5 shows a

decoupling diagram for the AMC0x00D.

AMC0200D, AMC0300D

SBASAR7 – SEPTEMBER 2025

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