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IS25LEG-RLLA2:P-TY 데이터시트(PDF) 177 Page - Integrated Silicon Solution, Inc

부품명 IS25LEG-RLLA2:P-TY
상세설명  SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  193 Pages
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제조업체  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LEG-RLLA2:P-TY 데이터시트(HTML) 177 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc.- www.issi.com
177
Rev. A3
10/02/2025
8.72 CLEAR ECC REGISTER OPERATION (CLECC, B6h)
A Clear ECC Register (CLECC) instruction clears all ECC register bits [47:1] to “0” except for ECCONOFF bit [0].
Once any bits are set to “1”, they remain set to “1” until they are cleared to “0” with a CLECC command.
Figure 8.158 Clear ECC Register Sequence In SPI Mode
Instruction = B6h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.159 Clear ECC Register Sequence In QPI Mode
B6h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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