IS25LEG-RGLA2:P-TY datasheet(122/193 Pages) ISSI

부품명	IS25LEG-RGLA2:P-TY

상세설명	SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	193 Pages

Scroll/Zoom	100%

제조업체	ISSI [Integrated Silicon Solution, Inc]

홈페이지	http://www.issi.com

Logo

122 / 193 page

IS25LE01GG

IS25WE01GG

Integrated Silicon Solution, Inc.- www.issi.com

122

Rev. A3

10/02/2025

Figure 8.79 Software Reset Enable and Software Reset Sequence In QPI Mode (RSTEN, 66h + RST, 99h)

66h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

99h

8.39 SECURITY INFORMATION ROW

The security Information Row is comprised of an additional 4 x 512 bytes of programmable information. The security

bits can be reprogrammed by the user. Any program security instruction issued while an erase, program or write

cycle is in progress is rejected without having any effect on the cycle that is in progress.

Table 8.10 Information Row Valid Address Range

Address Assignment

A[23:17]

A[16:9]

A[8:0]

IRL0 (Information Row Lock0)

00h

Byte address

IRL1

00h

08h

Byte address

IRL2

00h

10h

Byte address

IRL3

00h

18h

Byte address

Bit 7~4 of the Function Register is used to permanently lock the programmable memory array.

When Function Register bit IRLx = “0”, the 512 bytes of the programmable memory array can be programmed.

When Function Register bit IRLx = “1”, the 512 bytes of the programmable memory array function as read only.

IS25LEG-RGLA2:P-TY 데이터시트(PDF) 122 Page - Integrated Silicon Solution, Inc

IS25LEG-RGLA2:P-TY 데이터시트(HTML) 122 Page - Integrated Silicon Solution, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL