TMUX7436FPWR datasheet(39/50 Pages) TI2

부품명	TMUX7436FPWR

상세설명	TMUX7436F ±60 V Fault-Protected, Dual 2:1 Multiplexer With Latch-Up Immunity and 1.8 V Logic

PDF	50 Pages

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제조업체	TI2 [Texas Instruments]

홈페이지	https://www.ti.com

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39 / 50 page

8.4.3 Truth Tables

Table 8-1 and Table 8-2 provides the truth tables for the TMUX7436F under normal and fault conditions.

Table 8-1. TMUX7436F Truth Table

SEL2

SEL1

Normal Condition

Fault Condition

State of Specific Flag (SF) when fault occurs on

On Switch

S1A

S1B

S2A

S2B

None

S1B, S2B

S1A, S2B

S1B, S2A

S1A, S2A

Take note, more than one source pin can be in fault at a given time. As Table 8-1 provides, the SF pin will assert

low even when multiple source pins are under fault.

Table 8-2. TMUX7436F DR Truth Table

DR PIN STATE

Dx State During Fault

Condition

Pulled up to VDD or VSS

Open (HI-Z)

If unused, then SELx pins must be tied to GND to ensure the device does not consume additional current (for

more information, refer to Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx or Dx)

should be connected to GND.

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TMUX7436F

SCDS459A – OCTOBER 2022 – REVISED NOVEMBER 2022

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TMUX7436FPWR 데이터시트(PDF) 39 Page - Texas Instruments