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TMUX7308FRRPR 데이터시트(PDF) 4 Page - Texas Instruments

부품명 TMUX7308FRRPR
상세설명  TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic
PDF  54 Pages
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TMUX7308FRRPR 데이터시트(HTML) 4 Page - Texas Instruments

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1
A0
16
A1
2
EN
15
GND
3
VSS
14
VDD
4
S1A
13
S1B
5
S2A
12
S2B
6
S3A
11
S3B
7
S4A
10
S4B
8
DA
9
DB
Not to scale
Figure 6-3. PW Package, 16-Pin TSSOP (Top View)
1
VSS
12
VDD
2
S1A
11
S1B
3
S2A
10
S2B
4
S3A
9
S3B
Not to scale
Thermal
Pad
Figure 6-4. RRP Package, 16-Pin WQFN (Top View)
Table 6-2. Pin Functions: TMUX7309F
PIN
TYPE(1)
DESCRIPTION
NAME
TSSOP
WQFN
A0
1
15
I
Logic control input address 0 (A0), has internal 4 MΩ pull-down resistor. Controls switch state
as shown in Section 9.4.3.
EN
2
16
I
Active high logic enable (EN) pin, has internal 4 MΩ pull-down resistor. The device is disabled
and all switches become high impedance when the pin is low. When the pin is high, the Ax
logic inputs determine individual switch states as shown in Section 9.4.3.
VSS
3
1
P
Negative power supply. This pin is the most negative power-supply potential. In single-supply
applications, this pin can be connected to ground. For reliable operation, connect a decoupling
capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
S1A
4
2
I/O
Overvoltage protected source pin 1A. Can be an input or output.
S2A
5
3
I/O
Overvoltage protected source pin 2A. Can be an input or output.
S3A
6
4
I/O
Overvoltage protected source pin 3A. Can be an input or output.
S4A
7
5
I/O
Overvoltage protected source pin 4A. Can be an input or output.
DA
8
6
I/O
Drain terminal A. Can be an input or output. The drain pin is not overvoltage protected.
DB
9
7
I/O
Drain terminal B. Can be an input or output. The drain pin is not overvoltage protected.
S4B
10
8
I/O
Overvoltage protected source pin 4B. Can be an input or output.
S3B
11
9
I/O
Overvoltage protected source pin 3B. Can be an input or output.
S2B
12
10
I/O
Overvoltage protected source pin 2B. Can be an input or output.
S1B
13
11
I/O
Overvoltage protected source pin 1B. Can be an input or output.
VDD
14
12
P
Positive power supply. This pin is the most positive power-supply potential. For reliable
operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and
GND.
GND
15
13
P
Ground (0 V) reference
A1
16
14
I
Logic control input address 1 (A1), has internal 4 MΩ pull-down resistor. Controls switch state
as shown in Section 9.4.3.
Thermal Pad
P
The thermal pad is not connected internally. It is recommended that the pad be tied to GND or
VSS for best performance.
(1)
I = input, O = output, I/O = input and output, P = power
TMUX7308F, TMUX7309F
SCDS403C – FEBRUARY 2021 – REVISED JULY 2023
www.ti.com
4
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TMUX7308F TMUX7309F



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