PR

EL

IM

INA

RY

MLX71122

300 to 930MHz

FSK/FM/ASK Receiver

39010 71122

Page 2 of 44

Data Sheet

Rev. 007

Oct/07

Document Content

1

Theory of Operation ...................................................................................................4

1.1

General ............................................................................................................................. 4

1.2

Technical Data Overview.................................................................................................. 4

1.3

Block Diagram .................................................................................................................. 5

1.4

Enable/Disable in ABC Mode ........................................................................................... 6

1.5

Demodulation Selection in ABC Mode.............................................................................. 6

1.6

Programming Modes ........................................................................................................ 6

1.7

Preconfigured Frequencies in ABC Mode ........................................................................ 6

2

Pin Definitions and Descriptions ..............................................................................7

3

Functional Description ............................................................................................11

3.1

Frequency Planning........................................................................................................ 11

3.2

Calculation of Counter Settings ...................................................................................... 12

3.2.1

Calculation of LO1 and IF1 frequency for Low Frequency Bands............................................. 12

3.2.2

Calculation of LO1 and IF1 frequency for High Frequency Bands ............................................ 13

3.2.3

Counter Setting Examples for SPI Mode ................................................................................... 13

3.2.4

Counter Settings in ABC Mode – 8 Preconfigured Channels.................................................... 14

3.3

PLL Frequency Synthesizer ........................................................................................... 14

3.3.1

Pulse Swallow Counter .............................................................................................................. 15

3.3.2

PLL Counter Ranges ................................................................................................................. 16

3.3.3

Reference Oscillator (RO) ......................................................................................................... 16

3.3.4

Phase-Frequency Detector (PFD) ............................................................................................. 17

3.3.5

Charge Pump (CP) .................................................................................................................... 17

3.3.6

Loop Filter (LF) .......................................................................................................................... 17

3.3.7

Lock Detector (LD)..................................................................................................................... 18

3.3.8

Voltage Controlled Oscillator (VCO) .......................................................................................... 18

3.4

Receiver Front End......................................................................................................... 19

3.4.1

Low Noise Amplifier (LNA) and Mixer 1 (MIX1)......................................................................... 19

3.4.2

Mixer 2 (MIX2) ........................................................................................................................... 19

3.4.3

IF Filter (IFF) .............................................................................................................................. 20

3.4.4

IF Amplifier (IFA) ........................................................................................................................ 21

3.4.5

Automatic Gain Control (AGC) .................................................................................................. 21

3.4.6

FSK Demodulator ...................................................................................................................... 21

3.5

Data Path........................................................................................................................ 22

3.5.1

Data Filter (DF) .......................................................................................................................... 22

3.5.2

Averaging Data Slicer Mode ...................................................................................................... 22

3.5.3

Peak Detectors (PKDET) ........................................................................................................... 23

3.5.4

Output Comparator .................................................................................................................... 23

3.6

Frequency Acceptance Range ....................................................................................... 23

3.7

Biasing System ............................................................................................................... 24

3.8

Operating Modes ............................................................................................................ 24