L4938NPD datasheet(7/12 Pages) STMICROELECTRONICS

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RESET CIRCUIT

The blockcircuit diagramof theresetcircuit isshown

in fig.4. The reset circuit supervisesthe standbyout-

put voltage. The reset threshold of 4.7V is defined

by the internal reference voltage and the standby

output divider.

The reset pulse delay time tRD, is defined by the

charge time of an external capacitor CT :

CT x2V

tRD =

µA

The reaction time of the reset circuit dependson the

discharge time limitation of the reset capacitor CT

and is proportional to the value of CT.

The reaction time of the reset circuit increases the

noise immunity. In fact,if the standby outputvoltage

drops below the reset threshold for a time shorter

than the reaction time tRR, no reset output variation

occurs. The nominal reset delay is generated for

standby output voltage drops longer than the time

necessary for the complete discharging of the ca-

pacitor CT. This time is typically equal to 50

µsif

CT = 100nF.The typical reset outputwaveformsare

shown in fig. 5.

SENSE COMPARATOR

This circuit comparesan input signal withan internal

voltage reference of typically 1.23V. The use of an

externalvoltage divider makes the comparator very

flexible in the application. This function can be used

to supervisethe input voltage - eitherbefore or after

the protectiondiode - and to give additionalinforma-

tion tothe microprocessorsuch aslow voltagewarn-

ings.

If this feature is not used SI and SO have to con-

nected to GND. In this case the St-by quiescent cur-

rent (14V) increases from 290

µA to 300µA.

Figure 4: Block Diagram of the Reset Circuit.

L4938N - L4938ND - L4938NPD

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L4938NPD 데이터시트(PDF) 7 Page - STMicroelectronics