| 전자부품 데이터시트 검색엔진 |
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SC8723QFKR 데이터시트(PDF) 3 Page - SOUTHCHIP Semiconductor Technology |
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SC8723QFKR 데이터시트(HTML) 3 Page - SOUTHCHIP Semiconductor Technology |
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3 / 6 page ![]() SC8723 PRELIMINARY SPEC SOUTHCHIP SEMICONDUCTOR SOUTHCHIP CONFIDENTIAL, SUBJECT TO CHANGE Copyright © 2021, Southchip Semiconductor Technology (Shanghai) Co., Ltd. 3 6 Terminal Configuration and Functions Top View VIN PGND PGND PGND VOUT VOUT VIN 1 3 4 14 PGND 2 5 12 15 16 EN MODE 13 TERMINAL I/O DESCRIPTION NUMBER NAME 1,2 VIN PWR The power input node of the converter. 3,4,13,14 PGND PWR Power ground. User shall connect PGND and AGND together on PCB. 5 EN I Enable logic input. Logic high level enables the device and logic low level disables the device. 6 ILIM I Connect a resistor to set the current limit value of output current. 7 COMP I Connect a RC network to compensate the control loop. 8 AGND I/O Analog ground. User shall connect PGND and AGND together on PCB. 9 FB I Feedback node of VOUT output voltage. Set the VOUT output voltage by the resistor divider connected at this pin. Output voltage be configured for fixed 5.1V with FB pin connected to GND. 10 FREQ I Set typical switching frequency of the device. FREQ pin ties to AGND: 250kHz (RFREQ <20KΩ) FREQ pin keeps floating: 500kHz (RFREQ >700KΩ) 50 KΩ < R FREQ < 80KΩ: 750kHz 180 KΩ < R FREQ < 320KΩ: 1MHZ The FREQ pin status is re-loaded when VIN power cycle or EN from low to high. TEL:17512016690 QQ:1843079631 |
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