CY2210

Rev 1.0, November 25, 2006

Page 8 of 10

Notes:

7. CPUCLK on and CPUCLK off latency is 2 or 3 CPUCLK cycles.

8. CPU_STOP may be applied asynchronously. It is synchronized internally.

CPU-PCI Clock Skew

CPU

PCI

CPU_STOP Timing

CPUCLK

(Internal)

PCICLK

(Internal)

PCICLK

(Free-Running)

CPU_STOP

CPU, CPU/2, AGP

(External)

[7, 8]

PCI_STOP

CPUCLK

(Internal)

PCICLK

(Internal)

PCICLK

PCI_STOP

PCICLK

(External)

(Free-Running)

PWR_DOWN

CPUCLK

(Internal)

PCICLK

(Internal)

PWR_DWN

PCICLK

CPUCLK

(External)

(External)

VCO

Crystal

Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock.