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LM1237 데이터시트(PDF) 30 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LM1237
상세설명  150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs
PDF  42 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM1237 데이터시트(HTML) 30 Page - National Semiconductor (TI)

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Display Page RAM (Continued)
TABLE 12. Example 3 I
2C Sequences (Continued)
Data Sent
Description
RAM Address
0xBA
Chip address (See the Microcontroller Interface Section)
0x06
Address LSB
0x80
Address MSB
0x00
Use Attribute table 0x00 for the following character
0x03
Skip 3 lines Command
0x8006
0x01
Row-End (RE) Command
0x8007
I
2C stop condition (See the Microcontroller Interface Section)
I
2C start condition (See the Microcontroller Interface Section)
0xBA
Chip address (See the Microcontroller Interface Section)
0x08
Address LSB
0x80
Address MSB
0x0A
Use Attribute table 0x0A for the following characters
0x00
Skip 0 lines Command
0x8008
0x05
Character “D”
0x8009
0x06
Character “E”
0x800A
0x07
Character “F”
0x800B
0x08
Character “G”
0x800C
0x09
Character “H”
0x800D
0x00
Window-End (WE) Command
0x800E
I
2C stop condition (See the Microcontroller Interface Section)
Control Register Definitions
OSD INTERFACE REGISTERS
Frame Control Register 1
Register Name (address): FRMCTRL1 (0x8400)
20023435
Bit 0
On-Screen Display Enable. The On-Screen Display will be disabled when this bit is a zero. When this bit is a
one the On-Screen Display will be enabled and Display Window 1 will be enabled if Bit 1 of this register is a
one; likewise Display Window 2 will be enabled if Bit 2 of this register is a one.
Bit 1
Display Window 1 Enable. When Bit 0 of this register and this bit are both ones, Display Window 1 is enabled.
If either bit is a zero, then Display Window 1 will be disabled.
Bit 2
Display Window 2 Enable. When Bit 0 of this register and this bit are both ones, Display Window 2 is enabled.
If either bit is a zero, then Display Window 2 will be disabled.
Bit 3
Clear Display Page RAM. Writing a one to this bit will result in setting all of the Display Page RAM values to
zero. This bit is automatically cleared after the operation is complete.
Bit 4
Transparent Disable. When this bit is a zero, a palette color of black (i.e., color palette look-up table value of
0x00) in the first 8 palette look-up table address locations (i.e., ATT0–ATT7) will be interpreted as transparent.
When this bit is a one, the color will be interpreted as black.
Bits 7–5
Reserved (Should be set to zero)
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