L6260 datasheet(19/30 Pages) STMICROELECTRONICS

19 / 30 page

System clock (FCLK input) and its Pre Scale

System clock (FCLK input) and its Pre Scale The

chip must be clocked via the FCLK pin at one of

two possible input frequency ranges, 4-6MHz or

8-12MHz. The required range is set up via regis-

ter bit 4.3 (System Control Register B, Sys Clock

Prescale bit) where 0 selects the lower frequency

of 4-6MHz and a 1 selects the higher input range

of 8-12MHz.

VCM System

The following functions are provided: Voltage

controlled retract including sourcing and sinking

current, two quadrant retract, with ”Spindle Pow-

ered” or ”Commanded” Retract. The VCM DAC

the DAC value to be changed. This drives the

VCM DAC and in turn the VCM driver.

VCM Compensation and Loop Equations

This information will be included in the next ver-

sion of this datasheet.

VCM Driver

The VCM driver is capable of supplying +/- 300

mA of current although higher peak currents are

acceptable for short periods of time. Closed loop

control of the load current is provided by the

power amplifier which consists of an error ampli-

fier followed by an H bridge output section. The

loop is compensated by an external RC network

connected to the VCM_COMP pin.

The direction of the current flowing in the bridge is

determined by the sign bit. The H bridge has two

pairs of lower drivers, only one of which is se-

lected at a given time. Such a configuration

makes it possible to choose between two values

of transconductance by selecting the appropriate

pair of drivers. This gain selection is accom-

plished using the VCM DAC Register.

The VCM current sense amplifier produces a volt-

age which is proportional to the current flow in the

voice coil. When the system is operating in a lin-

ear fashion, the steady state voltage at the

VCM_I_SNS pins is approximately equal to the

voltage commanded by the DAC. However, under

MICRO

CLK

SCLK

DATA

CS1

SLOAD

SDIO

R/W

CS2

CLK

DATA

R/W

L6260

OTHER

DEVICE

D94IN096

Figure 7: System Level Interface

VCM

DAC

(REG 1)

DAC BIT 9

DAC BIT 8

DAC BIT 7

DAC BIT 6

DAC BIT 5

DAC BIT 4

DAC BIT 3

DAC BIT 2

DAC BIT 1

DAC BIT 0

VCM

DAC

VREF 1.25V

REF/5

AUTOZERO

OFFSET

OTA

0.0 - 0.25V

DACOUT

VCM

DRIVER

LOGIC

POS

NEG

VCM

DRIVER

LOGIC

+COURSE

+FINE

-COURSE

-FINE

INDUCTOR

D94IN097A

COURSE/FINE

Figure 8.

L6260

19/30

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