전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

LTC1069-7 데이터시트(PDF) 8 Page - Analog Devices

부품명 LTC1069-7
상세설명  Linear Phase 8th Order Lowpass Filter
PDF  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

LTC1069-7 데이터시트(HTML) 8 Page - Analog Devices

Back Button LTC1069-7 Datasheet HTML 2Page - Analog Devices LTC1069-7 Datasheet HTML 3Page - Analog Devices LTC1069-7 Datasheet HTML 4Page - Analog Devices LTC1069-7 Datasheet HTML 5Page - Analog Devices LTC1069-7 Datasheet HTML 6Page - Analog Devices LTC1069-7 Datasheet HTML 7Page - Analog Devices LTC1069-7 Datasheet HTML 8Page - Analog Devices LTC1069-7 Datasheet HTML 9Page - Analog Devices LTC1069-7 Datasheet HTML 10Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 8 / 10 page
background image
LTC1069-7
8
10697fa
Wideband Noise
The wideband noise of the filter is the total RMS value
of the device’s noise spectral density and determines the
operating signal-to-noise ratio. Most of the wideband
noise frequency contents lie within the filter passband.
The wideband noise cannot be reduced by adding post
filtering. The total wideband noise is nearly independent
of the clock frequency and depends slightly on the power
supply voltage (see Table 3). The clock feedthrough
specifications are not part of the wideband noise.
Table 3. Wideband Noise
VS
CLOCK FEEDTHROUGH
4.75V
125μVRMS
±5V
140μVRMS
Aliasing
Aliasing is an inherent phenomenon of sampled data
systems and it occurs for input frequencies approaching
the sampling frequency. The internal sampling frequency
of the LTC1069-7 is 50 times its fCUTOFF frequency. For
instance if a 48kHz, 100mVRMS signal is applied at the
APPLICATIONS INFORMATION
input of an LTC1069-7 operating with a 50% duty cycle
25kHz clock, a 2kHz, 741μVRMS alias signal will appear
at the filter output. Table 4 shows details.
Table 4. Aliasing
INPUT FREQUENCY
VIN = 1VRMS
OUTPUT LEVEL
Relative to Input
OUTPUT FREQUENCY
Aliased Frequency
fCLK/fC = 25:1, fCUTOFF = 1kHz
40kHz (or 60kHz)
–59.9dB
10kHz
47kHz (or 53kHz)
–54.2dB
3kHz
48kHz (or 52kHz)
–42.6dB
2kHz
48.5kHz (or 51.5kHz)
–18.3dB
1.5kHz
49kHz (or 52kHz)
–2.9dB
1.0kHz
49.5kHz (or 50.5kHz)
–0.65dB
0.5kHz
Speed Limitations
To avoid op amp slew rate limiting, the signal amplitude
should be kept below a specified level as shown in Table 5.
Table 5. Maximum VIN vs VS and Clock
VS
MAXIMUM CLOCK
MAXIMUM VIN
5V
≥ 2.5MHz
340mVRMS (fIN ≥ 200kHz)
±5V
≥ 4.5MHz
1.2VRMS (fIN ≥ 400kHz)



Html Pages

1 2 3 4 5 6 7 8 9 10


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com