| 전자부품 데이터시트 검색엔진 |
|
CLC014 데이터시트(PDF) 4 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
CLC014 데이터시트(HTML) 4 Page - National Semiconductor (TI) |
|
4 / 17 page ![]() Electrical Characteristics (Continued) (V CC = +5V, V EE = 0V, signal source swing = 0.8 Vpp(Note 4), CAEC = 100 pF) Parameter Conditions Typ +25˚C Min/Max +25˚C Min/Max −40˚C to +85˚C Units AEC+/AEC− common mode 3.6 _ _ V output eye monitor (OEM) bias potential 3.2 _ _ V carrier detect (CD) current output-HIGH CD V OH = 4.5V −400 _ _ µA carrier detect (CD) current output-LOW CD V OL = 0.5V 600 _ _ µA MUTE voltage input-HIGH (Note 3) 1.8 2.0 2.0 V MUTE voltage input-LOW (Note 3) 1.2 0.8 0.8 V MUTE current input-HIGH V IH = 5V (Note 3) 5.0 ±100 ±500 nA MUTE current input-LOW V IL = 0V (Note 3) 0.2 ±100 ±500 nA TIMING PERFORMANCE CD Response Time carrier applied (Note 8) 1.0 _ _ µs carrier removed (Note 9) 12 _ _ µs MUTE response time (Note 10) 2.0 _ _ ns MISCELLANEOUS PERFORMANCE input resistance single-ended 7.3 _ _ k Ω input capacitance single-ended (Note 11) 1.0 _ _ pF input return loss @ 270 MHz Z o =75 Ω (Note 12) 19 _ _ dB maximum cable attenuation 200 MHz (Note 13) 40 _ _ dB Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: J-level: spec. is 100% tested at +25˚C. Note 4: These specifications assume an 800 mVpp signal at the cable input. Levels above and below 800 mV are allowable, but performance may vary. The cable will attenuate the signal prior to entering the equalizer. Note 5: Peak-to-peak jitter is defined as 6 times the rms jitter. Note 6: For more information, see “CLC014 Operation” and “Design Guidelines”. Note 7: 50% eye opening. Note 8: Time from application of a valid signal to when the CD output asserts high. Note 9: Time from the removal of a valid signal to when the CD output asserts low. Note 10: Time from assertion of MUTE to when the output responds. Note 11: Device only. Does not include typical pc board parasitics. Note 12: Includes typical pc board parasitics. Note 13: This sets the maximum cable length for the equalizer. Note 14: Human body model, 1.5 k Ω in series with 100 pF; based on limited test data. Note 15: To maintain specified performance, do not reduce DO/DO below this level. www.national.com 4 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |