6

FN7305.5

November 30, 2007

Applications Information

Logic Control

The EL9110 has three logical input pins, Chip Enable

(ENBL), Common Mode Extend (CMEXT), and Switch Gain

(X2). The logic circuits all have a nominal threshold of 1.1V

above the potential of the logic reference pin. In most

applications it is expected that this chip will run from a +5V,

0V, -5V supply system with logic being run between 0V and

+5V. In this case the logic reference voltage should be tied to

the 0V supply. If the logic is referenced to the -5V rail, then

the logic reference should be connected to -5V. The logic

reference pin sources about 60µA and this will rise to about

200µA if all inputs are true (positive).

The logic inputs all source up to 10µA when they are held at

the logic reference level. When taken positive, the inputs

sink a current dependent on the high level, up to 50µA for a

high level 5V above the reference level.

The logic inputs, if not used, should be tied to the

appropriate voltage in order to define their state.

Control Reference and Signal Reference

Analog control voltages are required to set the equalizer and

contrast levels. These signals are voltages in the range 0V

to 1V, which are referenced to the control reference pin. It is

expected that the control reference pin will be tied to 0V and

the control voltage will vary from 0V to 1V. It is; however,

acceptable to connect the control reference to any potential

between -5V and 0V to which the control voltages are

referenced.

The control voltage pins themselves are high impedance.

The control reference pin will source between 0µA and

200µA depending on the control voltages being applied.

The control reference and logic reference effectively remove

the necessity for the 0V rail and operation from ±5V (or 0V

and 10V) only is possible. However we still need a further

reference to define the 0V level of the single ended output

signal. The reference for the output signal is provided by the

0V pin. The output stage cannot pull fully up or down to

either supply so it is important that the reference is

positioned to allow full output swing. The 0V reference

should be tied to a 'quiet ground' as any noise on this pin is

transferred directly to the output. The 0V pin is a high

impedance pin and draws dc bias currents of a few µA and

similar levels of AC current.

Common Mode Extension

The common mode extension circuitry extends the range of

input common mode voltage before the input differential

amplifier is overloaded. It does this by reducing the voltage

equally at both inputs of the first differential amplifier as the

common mode signal rises towards the supply. Similarly,

when the common mode input signal goes low, the inputs to

the first differential amplifier are raised whilst preserving the

differential signal and maintain the amplifier within its

common mode operating range.

This operation may not always be desirable. A problem

occurs because the EL9110 sinks or sources a common

mode current though its input pins to create the common

mode offset voltage. Assuming the system has been set up

so that the differential line has a well-balanced impedance,

then a problem will only occur when the common mode

impedance to ground is not low. This will occur in systems

where the inputs to the EL9110 are AC coupled. In such

systems it is recommended that the common mode

extension be disabled. In systems where the differential

input signal is directly coupled and has its common mode

level defined by a low impedance line driver, the common

mode extension circuitry can extend the total common mode

range by 2V to 3V.

Equalizing

When transmitting a signal across a twisted pair cable, it is

found that the high frequency (above 1MHz) information is

attenuated more significantly than the information at low

frequencies. The attenuation is predominantly due to

resistive skin effect losses and has a loss curve which

depends on the resistivity of the conductor, surface condition

of the wire and the wire diameter. For the range of high

performance twisted pair cables based on 24awg copper

wire (Cat 5 etc.) these parameters vary only a little between

cable types, and in general cables exhibit the same

frequency dependence of loss. (The lower loss cables can

be compared with somewhat longer lengths of their more

lossy brothers.) This enables a single equalizing law

equation to be built into the EL9110.

With a control voltage applied between pins 2 and 1, the

frequency dependence of the equalization is shown in

Figure 8. The equalization matches the cable loss up to

about 100MHz. Above this, system gain is rolled off rapidly

to reduce noise bandwidth. The roll-off occurs more rapidly

for higher control voltages, thus the system (cable +

equalizer) bandwidth reduces as the cable length increases.

This is desirable, as noise becomes an increasing issue as

the equalization increases.

The cable loss for 100m, 200m, and 300m of CAT 5 cable,

based on manufacturer's loss curves is shown in Figure 14.

Thus:

and:

Contrast

By varying the voltage between pins 7 and 1, the gain of the

signal path can be changed in the ratio 4:1. The gain change

varies almost linearly with control voltage. For normal

EL9110