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Revision 1.5, October 11, 2002
27
Data Sheet
VT1616 6-Channel AC97 Codec with S/PDIF
Multiple Codec Example
The primary codec provides the master BIT_CLK. The secondary codec, if any, and the controller, will use this clock to
work in synchronous mode. Note that the ID[1:0] pins are internally pulled up; therefore, it is necessary to pull the
ID[1:0] pins low to set the codec as secondary. Notice that the state of the ID[1:0] pins are reflected in reverse polarity
as shown on Table 5 on page 19. See Reg. 28h for more details.
Figure 4.Multiple Codec Example
DC ‘97
SYNC
BIT_CLK
SDATA_OUT
RESET#
SDATA_IN0
SDATA_IN1
AC ‘97 ~ Primary
SYNC
BIT_CLK
SDATA_OUT
RESET#
SDATA_IN
ID0
ID1
1
1
AC ‘97 ~ Secondary
SYNC
BIT_CLK
SDATA_OUT
RESET#
SDATA_IN
ID0
ID1
1
0
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