PCF85263ATSLASHA datasheet(42/102 Pages) NXP

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NXP Semiconductors

PCF85263A

Tiny RTC/Calendar with Alarm Function, Battery Switch-Over, Time Stamp Input, and I2C-bus

[1]

Default value.

Oscillator circuits suffer from jitter. In particular, ultra low-power oscillators like the one used in the PCF85263A

are optimized for power and not jitter. By setting the LOWJ bit, the jitter performance can be improved at the

cost of power consumption.

7.10.5 OSCD[1:0]: Quartz oscillator drive control

Bit

Symbol

Value

Description

Oscillator drive bits

00 [1]

Normal drive; RS(max): 100 kΩ

Low drive; RS(max): 60 kΩ; reduced IDD

3 to 2

OSCD[1:0]

10, 11

High drive; RS(max): 500 kΩ; increased IDD

Table 33. OSCD[1:0] bits - oscillator control register (address 25h)

[1]

Default value.

The oscillator is designed to be used with quartz with a series resistance up to 100 kΩ. It covers the typical

range of 32.768 kHz quartz crystals. Series resistance is also referred to as: ESR, motional resistance, or RS.

A low drive mode is available for low series resistance quartz, which reduces the current consumption.

For very high series resistance quartz, there is a high drive mode. Current consumption increases substantially

in this mode.

7.10.6 CL[1:0]: Quartz oscillator load capacitance

Bit

Symbol

Value

Description

Internal oscillator capacitor selection for quartz crystals

with the corresponding load capacitance of CL:

00 [1]

7.0 pF

6.0 pF

12.5 pF

1 to 0

CL[1:0]

12.5 pF

Table 34. CL[1:0] bits - oscillator control register (address 25h)

[1]

Default value.

CL refers to the load capacitance of the oscillator circuit and allows for a certain amount of package and PCB

parasitic capacitance. When the oscillator circuit matches the CL parameter of the quartz, then the frequency

offset is zero.

The PCF85263A is designed to operate with quartz with CL values of 6.0 pF, 7.0 pF, and 12.5 pF.

12.5 pF are generally the cheapest and most widely available, but also require the most power to drive. The

circuit also operates with 9.0 pF quartz. However, the offset calibration is needed to compensate. If a 9.0 pF

quartz is used, then it is recommended to set CL to 7.0 pF.

7.11 Battery switch register

This register configures the battery switch-over mode.

PCF85263A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.4 — 12 December 2025

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