MPF0900AMMA2ES datasheet(166/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

• VSW2_RUN[7:0]

• VSW3_RUN[7:0]

• VSW4_RUN[7:0]

• VSW5_RUN[7:0]

• VSELECT_EN

• LDO1_RUN_EN

• LDO2_RUN_EN

• LDO3_RUN_EN

• SW1_RUN_MODE[1:0]

• SW2_RUN_MODE[1:0]

• SW3_RUN_MODE[1:0]

• SW4_RUN_MODE[1:0]

• SW5_RUN_MODE[1:0]

2. Initiate request for LBIST on demand by sending SYS_CMD = 0x4A

3. Wait until the LBIST flag "LBIST_DONE_I" is set to "1"

4. Write back the registers content to the registers

5. Clear the LBIST flag (LBIST_DONE_I)

6. Release FS0B

When an LBIST on-demand routine is started, the device will assert the FS0B pin to set the system into a safe

state. It will perform the LBIST routine while maintaining functional operation such as providing proper output

voltage regulation.

The PF09 will test the logic gates controlling the following safety related mechanisms:

• OV/UV monitoring logic and deglitchers

• FCCU inputs

• ERRMON input

• Watchdog management

• Dynamic CRC

• FS0B control logic (on main)

• PGOOD control logic

• DMS interface logic (on main)

During LBIST on demand, the RSTB pin remains released to ensure the MCU is still out of reset and in control

of the system operation, in order to maintain a safe state during the execution of the LBIST routine.

When the MCU is requesting an LBIST on demand, it knows it will enter a non-monitored condition, therefore

it should stop any critical operation and enter a safe state until the LBIST_DONE interrupt is provided. The

system can inspect the result for the LBIST routine and proceed to release FS0B via I2C communication.

The LBIST_STATUS[1:0] bits will be used to read the status/result of the LBIST after the LBIST_DONE interrupt

is generated (see Table 219).

If the LBIST routine fails, the PF09 will not be able to release the FS0B pin until a new LBIST on-demand

routine is requested and LBIST passes.

To prevent a WD desynchronization during LBIST on demand, if the watchdog monitoring is enabled, the WD

counter will be temporarily halted during the LBIST routine and it will regain operation when the LBIST_DONE_I

flag is cleared. At this point, the system will be able to re-synchronize the WD when it clears the LBIST_DONE_I

flag.

The FS0B will not release if the LBIST_DONE_I flag is asserted.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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