MPF0900AMMA2ES datasheet(102/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

The VSWx_RUN[7:0] and VSWx_STBY[7:0] bits are designed as secure write bits to ensure that output

voltages are not changed by mistake during the SYSTEM ON states.

The OTP_SWx_DVS[1:0] bits are used to program the default slew rate for the SW regulator turn-on and

turn-off ramps. During the SYSTEM ON states, the DVS range is between 0.65 V and 0.9 V, with an OV/UV

threshold of 5 % or wider and a DVS ramp of 3.9 mV/μs or slower. The SYSTEM ON DVS rate is controlled by

the SWx_DVS[1:0] bits on the functional registers.

SWx_DVS[1:0]

Clocking factor

SWx ramp-up slope rate[1][2]

SWx ramp-down

slope rate[1][2]

1.95 mV/µs

3.9 mV/µs

7.8 mV/µs

15.6 mV/µs

Table 127. SWx ramp-down configuration

[1]

At 20 MHz high-frequency clock selection

[2]

The slope rate is calculated as (6.25 [mV] * FREQ [MHz]) / (8 * clocking factor).

In applications where the output capacitance is larger than the recommended value, the SWx_SLOWDVS bit

provides the option to force the ramp-down slope to the slowest discharge speed, to ensure the output is able to

fully discharge before a new turn-on cycle is started.

The SWx_SLOWDVS bit is reset to 1 at power-up and the MCU can modify it during the SYSTEM ON states if

the system requires a faster discharge on the SWx regulator.

SWx_SLOWDVS

Ramp-down DVS

Same as ramp up

1.95 mV/µs

Table 128. Ramp-down DVS

The SWx regulator is only allowed to request a dynamic voltage change when the default OTP value is set to

be within the DVS range (0.3 V to 1.35 V). A voltage configuration outside of the DVS range will be changed to

the default OTP value, and any voltage change requested via the I2C communication will be ignored to avoid an

invalid configuration.

The OTP_SWx_DVSMAX[3:0] bits are provided to define the maximum high-voltage delta allowed during a

DVS transition. Maximum high-voltage delta is calculated with respect to the default voltage setting selected

by the OTP_VSWx_RUN[7:0] bits, to ensure the system is not able to request a voltage change outside of the

selected limits defined for a specific application.

OTP_SWx_DVSMAX[3:0]

SWx high-voltage delta

0000

0.025 V

0001

0.050 V

0010

0.075 V

0011

0.100 V

0100

0.125 V

0101

0.150 V

0110

0.175 V

Table 129. SWx high-voltage delta

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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