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L9386MD 데이터시트(PDF) 8 Page - STMicroelectronics |
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L9386MD 데이터시트(HTML) 8 Page - STMicroelectronics |
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8 / 10 page ![]() CIRCUIT DESCRIPTION The L9386MD is a dual low side driver for induc- tive loads like valves in automotive environment. The device is enabled by a common CMOS com- patible ENABLE high signal. The internal pull down current sources at the ENABLE and INPUT pins protect the device in open input conditions against malfunctions. An output slope limitation for du/dt is implemented to reduce the EMI. An in- tegrated active flyback voltage limitation clamps the output voltage during the flyback phase to 50V. Each driver is protected against short circuit and thermal overload. In short circuit condition the output will be disabled after a short delay time tDOL to suppress spikes. This disable is latched until a negative slope occure at the correspondent input pin. The thermal disable for TJ > 175 °Cof the output will be reseted if the junction tempera- ture decreases about 20 °C below the disable threshold temperature. For the real time error diagnosis the voltage and the current of the outputs are compared with in- ternal fixed values VOUV for OFF and IOUC for ON conditions to recognize open load (RL ≥ 20KΩ,RL >38 Ω) in ON and OFF conditions. The diagnostic operates also in the extended supply voltage rang of 4.5V ≤ VS ≤ 32V. Also the output voltages VO1,2 are compared against each other in OFF condition with a fixed offset of ∆VOUV 1,2 to recognize GND bypasses. To suppress mail ∆VO diagnoses during the fly- back phases of the compared output, the ∆VO di- agnostic includes a latch function. Reaching the flyback clamping voltage VOC the diagnostic sig- nal is reseted by a latch. To activate again this kind of diagnostic a low signal at the correspon- dent INPUT or the ENABLE pin must occur (see also Fig.3). The diagnostic output level in connection with dif- ferent ENABLE and INPUT conditions allows to recognize different fail states, like overtemp, short to VSS, short to GND, bypass to GND and dis- connected load (see also page 7 diagnostic ta- ble). The diagnostic output is also protected against short to UDmax. Oversteping the over load current threshold IOo, the output current will be limited in- ternally during the diagnostic overload delay switch-off time tDOL. OUT1 OUT2 VS Z VALVE Z VALVE V Batt Channel 1 Channel 2 Output Control Overtemp R QS Delay Timer Overload Openload GND DIAG2 IN2 EN DIAG1 IN1 Controller +5V R O Diagnostic Control µ P Figure 5: Application circuit diagram. L9386MD 8/10 |
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