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CY7C374I-125JC 데이터시트(PDF) 5 Page - Cypress Semiconductor

부품명 CY7C374I-125JC
상세설명  UltraLogic??128-Macrocell Flash CPLD
PDF  15 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C374I-125JC 데이터시트(HTML) 5 Page - Cypress Semiconductor

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USE ULTRA37000™ FOR
ALL NEW DESIGNS
CY7C374i
Document #: 38-03031 Rev. *A
Page 5 of 15
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65
°C to +150°C
Ambient Temperature with
Power Applied............................................. –55
°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State ............................................... –0.5V to +7.0V
DC Input Voltage ............................................ –0.5V to +7.0V
DC Program Voltage .....................................................12.5V
Output Current into Outputs ........................................ 16 mA
Static Discharge Voltage........................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Operating Range
Range
Ambient
Temperature
VCC VCCINT
VCCIO
Commercial
0
°C to +70°C5V ± 0.25V 5V ± 0.25V or
3.3V
± 0.3V
Industrial
−40°C to +85°C5V ± 0.5V
5V
± 0.5V or
3.3V
± 0.3V
Military[2]
–55°C to +125°C 5V
± 0.5V
Electrical Characteristics Over the Operating Range[3, 4]
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3.2 mA (Com’l/Ind)
[5]
2.4
V
IOH = –2.0 mA (Mil)
V
VOHZ
Output HIGH Voltage with
Output Disabled[9]
VCC = Max.
IOH = 0 µA (Com’l/Ind)
[5, 6]
4.0
V
IOH = –50 µA (Com’l/Ind)
[5, 6]
3.6
V
VOL
Output LOW Voltage
VCC = Min.
IOL = 16 mA (Com’l/Ind)
[5]
0.5
V
IOL = 12 mA (Mil)
V
VIH
Input HIGH Voltage
Guaranteed Input Logical HIGH voltage for all inputs[7]
2.0
7.0
V
VIL
Input LOW Voltage
Guaranteed Input Logical LOW voltage for all inputs[7]
–0.5
0.8
V
IIX
Input Load Current
VI = Internal GND, VI = VCC
–10
+10
µA
IOZ
Output Leakage Current
VCC = Max., VO = GND or VO = VCC, Output Disabled
–50
+50
µA
VCC = Max., VO = 3.3V, Output Disabled
[6]
0
–70
–125
µA
IOS
Output Short
Circuit Current[8, 9]
VCC = Max., VOUT = 0.5V
–30
–160
mA
ICC
Power Supply Current
VCC = Max., IOUT = 0 mA,
Com’l/Ind.
125
200
mA
f = 1 MHz, VIN = GND, VCC
[10]
Com’l “L” –66
75
125
mA
Military
125
250
mA
IBHL
Input Bus Hold LOW
Sustaining Current
VCC = Min., VIL = 0.8V
+75
µA
IBHH
Input Bus Hold HIGH
Sustaining Current
VCC = Min., VIH = 2.0V
–75
µA
IBHLO
Input Bus Hold LOW
Overdrive Current
VCC = Max.
+500
µA
IBHHO
Input Bus Hold HIGH
Overdrive Current
VCC = Max.
–500
µA
Notes:
2. TA is the “instant on” case temperature.
3. See the last page of this specification for Group A subgroup testing information.
4. If VCCIO is not specified, the device can be operating in either 3.3V or 5V I/O mode; VCC=VCCINT.
5. IOH = –2 mA, IOL = 2 mA for SDO.
6. When the I/O is three-stated, the bus-hold circuit can weakly pull the I/O to a maximum of 4.0V if no leakage current is allowed. This voltage is lowered significantly
by a small leakage current. Note that all I/Os are three-stated during ISR programming. Refer to the application note “Understanding Bus Hold” for additional
information.
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
9. Tested initially and after any design or process changes that may affect these parameters.
10. Measured with 16-bit counter programmed into each logic block.



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