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FT232BM 데이터시트(PDF) 39 Page - Future Technology Devices International Ltd. |
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FT232BM 데이터시트(HTML) 39 Page - Future Technology Devices International Ltd. |
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39 / 54 page ![]() DS2232C Version 1.2 © Future Technology Devices International Ltd. 2004 Page 39 of 54 FT2232C Dual USB UART / FIFO I.C. Figure 24 - CPU FIFO Dual Channel Interface Example 2 Figure 24 shows an example where both channels A and B of the FT2232C are used in CPU FIFO mode to interface with a CPU. This configuration gives the CPU access to both of the FT2232C’s data pipes. CS#_A (ACBUS0) WR#_A (ACBUS3) A0_A (ACBUS1) RD#_A (ACBUS2) FT2232C CPU Data D[0...7]A (ADBUS[0...7]) Decoder WR# RD# Address Bus Data Bus Channel A Channel B CS#_B (BCBUS0) WR#B (BCBUS3) A0_B (BCBUS1) RD#_B (BCBUS2) D[0...7]B (BDBUS[0...7]) 15 13 12 11 30 29 28 27 |
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