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PRELIMINARY
CY28323
Document #: 38-07004 Rev. *B
Page 8 of 22
Data Byte 5
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
10
Latched FS4 input
Latched FS[4:0] inputs. These bits are read only.
X
Bit 6
7
Latched FS3 input
X
Bit 5
6
Latched FS2 input
X
Bit 4
23
Latched FS1 input
X
Bit 3
22
Latched FS0 input
X
Bit 2
--
FS_Override
0 = Select operating frequency by FS[4:0] input pins
1 = Select operating frequency by SEL[4:0] settings
0
Bit 1
--
Reserved
Reserved
0
Bit 0
23
SEL 48MHZ
0 = 24 MHz
1 = 48 MHz
0
Data Byte 6
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
Revision_ID3
Revision ID bit[3]
0
Bit 6
Revision_ID2
Revision ID bit[2]
0
Bit 5
Revision_ID1
Revision ID bit[1]
0
Bit 4
Revision_ID0
Revision ID bit[0]
0
Bit 3
Vendor_ID3
Bit[3] of Cypress Semiconductor’s Vendor ID. This bit is read-only.
1
Bit 2
Vendor_ID2
Bit[2] of Cypress Semiconductor’s Vendor ID. This bit is read-only.
0
Bit 1
Vendor _ID1
Bit[1] of Cypress Semiconductor’s Vendor ID. This bit is read-only.
0
Bit 0
Vendor _ID0
Bit[0] of Cypress Semiconductor’s Vendor ID. This bit is read-only.
0
Data Byte 7
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
--
Reserved
Reserved
0
Bit 6
--
Reserved
Reserved
0
Bit 5
--
Reserved
Reserved
0
Bit 4
--
Reserved
Reserved
0
Bit 3
--
Reserved
Reserved
0
Bit 2
--
Reserved
Reserved
0
Bit 1
--
Reserved
Reserved
0
Bit 0
--
Reserved
Reserved
0
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