| 전자부품 데이터시트 검색엔진 |
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LNBK10SP 데이터시트(PDF) 3 Page - STMicroelectronics |
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LNBK10SP 데이터시트(HTML) 3 Page - STMicroelectronics |
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3 / 18 page ![]() TABLE A: PIN CONFIGURATIONS SYMBOL NAME FUNCTION PIN NUMBER vs SALES TYPE (LNBK) 20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP VCC1 Supply Input 1 15V to 27V supply. It is automatically selected when VOUT =13 or 14V 12 11 11 11 1 VCC2 Supply Input 2 22V to 27V supply. It is automatically selected when VOUT =18 or 19V 23 22 22 22 2 LNBA Out put Port See truth tables for voltage and port selection. In stand-by mode this port is powered by the MI pin via the internal Bypass Switch 34 33 33 33 3 VSEL Output Voltage Selection: 13 or 18V (typ) Logic control input: See truth table 45 44 44 44 4 EN Port Enable Logic control input: See truth table 56 55 55 55 5 OSEL Port Selection Logic control input: See truth table 7 7 9 NANA NANA NANA GND G round Circuit Ground. It is internally connected to the die frame 81 10 11 20 66 66 66 6 ENT 22 KHz Tone Enable Logic control input: See truth table 9 13 7 77 77 77 CEXT External Capacitor Timing capacitor used by the Dynamic Overload Protection. Typical application is 4.7 µFfor a 1200 ms cycle 10 14 88 88 88 8 EXTM External Modulation External Modulation Input. Needs DC decoupling to the AC source. If not used, can be left open. 11 15 NA NA NA 9 NA 9 9 LLC Line Length Compens (+1V t yp) Logic control input: See truth table 12 16 NA NA 9 NA 9 NA 10 OLF Over Load F lag Logic output (open Collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs. 13 17 NA 9 NA NA 10 10 NA MI Master Input In stand-by mode, the voltage on MI is routed to LNBA pin. Can be left open if bypass function is not needed 14 18 NA 10 10 10 NA NA NA LNBB Out put Port See truth tables for voltage and port selection. 15 19 10 NA NA NA NA NA NA NOTE: The limited pin availability of the PowerSO-10 package leads to drop some functions. LNBK10 SERIES - LNBK20 3/18 |
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