M14256, M14128

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responding memory gives an acknowledgment on

does not match the Device Select code, it will de-

select itself from the bus, and go into stand-by

mode.

Each data byte in the memory has a 16-bit (two

byte wide) address. The Most Significant Byte (Ta-

ble 3) is sent first, followed by the Least significant

Byte (Table 4). Bits b15 to b0 form the address of

the byte in memory. Bit b15 is treated as a Don’t

Care bit on the M14256 memory. Bits b15 and b14

are treated as Don’t Care bits on the M14128

memory.

SCL

SDA

SCL

SDA

SDA

START

CONDITION

SDA

INPUT

SDA

CHANGE

AI00792

STOP

CONDITION

1

23

7

89

MSB

ACK

START

CONDITION

SCL

1

23

7

89

MSB

ACK

STOP

CONDITION

Note: 1. The most significant bit, b7, is sent first.

Device Code

Chip Enable

RW

b7

b6

b5

b4

b3

b2

b1

b0

Device Select

1010000

RW

Note: 1. b15 is Don’t Care on the M14256 series.

b15 and b14 are Don’t Care on the M14128 series.

Table 3. Most Significant Byte

b15

b14

b13

b12

b11

b10

b9

b8

Table 4. Least Significant Byte

b7

b6

b5

b4

b3

b2

b1

b0