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M27C320-80M1 데이터시트(PDF) 10 Page - STMicroelectronics

부품명 M27C320-80M1
상세설명  32 Mbit (4Mb x8 or 2Mb x16) OTP EPROM
PDF  15 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27C320-80M1 데이터시트(HTML) 10 Page - STMicroelectronics

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M27C320
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PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 100 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50
µs program pulses to each word
until a correct verify occurs (see Figure 10). During
programing and verify operation a MARGIN
MODE circuit is automatically activated to guaran-
tee that each cell is programed with enough mar-
gin. No overprogram pulse is applied since the
verify in MARGIN MODE provides the neccessary
margin to each programmed cell.
Program Inhibit
Programming of multiple M27C320s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C320 may be common. A TTL low level pulse
applied to a M27C320’s E input and VPP at 12V,
will program that M27C320. A high level E input in-
hibits the other M27C320s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL. Data should be verified with tELQV after the
falling edge of E.
Figure 9. Programming and Verify Modes AC Waveforms
Note: BYTE = VIH.
tAVEL
VALID
AI02205
A0-A20
Q0-Q15
VCC
DATA IN
DATA OUT
E
tQVEL
tVCHEL
tVPHEL
tEHQX
tEHVPX
tELQV
tELEH
tEHQZ
tVPLEL
PROGRAM
VERIFY
GVPP
tEHAX
Figure 10. Programming Flowchart
AI02220
n= 0
Last
Addr
VERIFY
E= 50
µs Pulse
++n
=25
++ Addr
VCC = 6.25V, VPP = 12V
FAIL
CHECK ALL WORDS
BYTE = VIH
1st: VCC =6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
SET MARGIN MODE



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