5/15

M27V101

(TA = 0 to 70

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurament conditions.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

0V

±10

µA

Output Leakage Current

0V

±10

µA

Supply Current

15

mA

Supply Current (Standby) TTL

1mA

Supply Current (Standby) CMOS

20

µA

Program Current

10

µA

Input Low Voltage

–0.3

0.8

V

(2)

Input High Voltage

2

V

Output Low Voltage

0.4

V

Output High Voltage TTL

2.4

V

Output High Voltage CMOS

Vcc – 0.7V

V

Symbol

Alt

Parameter

Test Condition

M27V101

Unit

-100

Min

Max

Min

Max

Address Valid to Output Valid

90

100

ns

Chip Enable Low to Output Valid

90

100

ns

Output Enable Low to Output Valid

45

50

ns

(2)

Chip Enable High to Output Hi-Z

030030

ns

(2)

Output Enable High to Output Hi-Z

030030

ns

Address Transition to Output

Transition

00

ns

The associated transient voltage peaks can be

suppressed by complying with the two line output

control and by properly selected decoupling ca-

pacitors. It is recommended that a 0.1

µF ceramic

tor of low inherent inductance and should be

placed as close to the device as possible. In addi-

tion, a 4.7

µF bulk electrolytic capacitor should be

es. The bulk capacitor should be located near the

power supply connection point. The purpose of the

bulk capacitor is to overcome the voltage drop

caused by the inductive effects of PCB traces.