M27V401 datasheet(2/15 Pages) STMICROELECTRONICS

2 / 15 page

M27V401

2/15

Figure 2B. LCC Pin Connections

AI00696

A10

A11

A13

M27V401

A14

Figure 2A. DIP Pin Connections

A13

A10

A14

A11

VSS

A17

A18

A16

A12

VPP

VCC

A15

AI01861

M27V401

For applications where the content is programmed

only one time and erasure is not required, the

M27V201 is offered in PDIP32, PLCC32 and

TSOP32 (8 x 20 mm) packages.

DEVICE OPERATION

The operating modes of the M27V401 are listed in

the Operating Modes table. A single power supply

is required in the read mode. All inputs are TTL

levels except for VPP and 12V on A9 for Electronic

Signature.

Read Mode

The M27V401 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. Chip Enable (E) is the power

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, indepen-

dent of device selection. Assuming that the ad-

dresses are stable, the address access time

(tAVQV) is equal to the delay from E to output

(tELQV). Data is available at the output after a delay

of tGLQV from the falling edge of G, assuming that

E has been low and the addresses have been sta-

ble for at least tAVQV-tGLQV.

Figure 2C. TSOP Pin Connections

A13

A10

A14

A11

A17

A18

A16

A12

VPP

VCC

A15

AI01156B

M27V401

(Normal)

VSS

M27V401 데이터시트(PDF) 2 Page - STMicroelectronics

M27V401 데이터시트(HTML) 2 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

데이터시트 다운로드

링크 URL