전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ZIOL2102 데이터시트(PDF) 82 Page - Renesas Technology Corp

부품명 ZIOL2102
상세설명  IO-Link Compliant HV Line Driver IC Family
PDF  92 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZIOL2102 데이터시트(HTML) 82 Page - Renesas Technology Corp

Back Button ZIOL2102 Datasheet HTML 78Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 79Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 80Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 81Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 82Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 83Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 84Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 85Page - Renesas Technology Corp ZIOL2102 Datasheet HTML 86Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 82 / 92 page
background image
ZIOL2xxx Datasheet
© 2016 Integrated Device Technology, Inc.
82
April 26, 2016
Figure 10.1 Peak Register Access Scenarios
Over-load /
Over-temp
Reg[20]
Peak Counter
Reg[21:25]
Overload
Counter
Exception
(state signal)
Reg[20]
monitored physical value exceeds the configured limit
overload counter equals
configured limit
time
time
time
Scenario A
Peak Counter
Reg[21:25]
Overload
Counter
time
Scenario B
Read Acces of
Peak Counter
(via SPI)
Value read
via SPI
In contrast to Figure 10.1 in where the overload situation stops at the point in time in which the driver has been
locked Figure 10.2 shows a situation in which the overload situation, especially an over-current situation is kept.
This situation occurs for instance due to a low impedance load which is permanently interconnected to the driver
output. In addition to that the lock reset is configured in that way that its period is significantly shorter compared
with the assert time period. In this case the overload counter does not reach the zero value at the point in time the
lock is reset. This in the following time the assert time is shortened and equals approximately the lock time that
even passed by.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com