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EM42AM3284LBA-8FE 데이터시트(PDF) 3 Page - Eorex Corporation |
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EM42AM3284LBA-8FE 데이터시트(HTML) 3 Page - Eorex Corporation |
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3 / 20 page ![]() eorex EM42AM3284LBA Jul. 2006 www.eorex.com Pin Description (Simplified) Pin Name Function G2,G3 CLK,/CLK (System Clock) Clock input active on the Positive rising edge except for DQ and DM are active on both edge of the DQS. CLK and /CLK are differential clock inputs. H7 /CS (Chip Select) /CS enables the command decoder when ”L” and disable the command decoder when “H”.The new command are over- Looked when the command decoder is disabled but previous operation will still continue. G1 CKE (Clock Enable) Activates the CLK when “H” and deactivates when “L”. When deactivate the clock,CKE low signifies the power down or self refresh mode. J8,J9,K7,K9,K1, K3,J1~J3,H1~H3, A0~12 (Address) Row address (A0 to A12) and Calumn address (CA0 to CA8) are multiplexed on the same pin. CA10 defines auto precharge at Calumn address. H8,H9 BA0, BA1 (Bank Address) Selects which bank is to be active. G9 /RAS (Row Address Strobe) Latches Row Addresses on the positive rising edge of the CLK with /RAS “L”. Enables row access & pre-charge. G8 /CAS (Column Address Strobe) Latches Column Addresses on the positive rising edge of the CLK with /CAS low. Enables column access. G7 /WE (Write Enable) Latches Column Addresses on the positive rising edge of the CLK with /CAS low. Enables column access. L8,L2,E8,E2 DQS0~3 (Data Input/Output) Data Inputs and Outputs are synchronized with both edge of DQS. K8,K2,F8,F2 DM0~3 (Data Input/Output Mask) DM controls data inputs.DM0 corresponds to the data on DQ0~DQ7.DM1 corresponds to the data on DQ8~DQ15…….. R8,P7,P8,N7,N8,M7, M8,L7,L3,M2,M3,N2, N3,P2,P3,R2,A8,B7, B8,C7,C8,D7,D8,E7, E3,D2,D3,C2,C3,B2, B3,A2 DQ0~31 (Data Input/Output) Data inputs and outputs are multiplexed on the same pin. A9,F1,R9/ A1,F9,R1 VDD/VSS (Power Supply/Ground) VDD and VSS are power supply pins for internal circuits. A7,B1,C9,D1,E9,L9, M1,N9,P1,R7/A3,B9, C1,D9,E1,L1,M9,N1, P9,R3 VDDQ/VSSQ (Power Supply/Ground) VDDQ and VSSQ are power supply pins for the output buffers. F3,F7 NC/RFU (No Connection/Reserved for Future Use) This pin is recommended to be left No Connection on the device. 3/20 |
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