| 전자부품 데이터시트 검색엔진 |
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INA151ADDFR 데이터시트(PDF) 21 Page - Texas Instruments |
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INA151ADDFR 데이터시트(HTML) 21 Page - Texas Instruments |
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21 / 39 page ![]() Time ( s) -10 0 10 20 30 40 50 60 70 -0.6 -3 -0.4 -2 -0.2 -1 0 0 0.2 1 0.4 2 0.6 3 0.8 4 1 5 1.2 6 Output Enable Figure 7-7. INA151 Enable/Disable Time The EN pin is referenced to DGND. If left floating, the EN pin is internally pulled up to enable the device. For use cases that require default disable mode use a pull-down resistor of maximum 150kΩ. If externally controlled, the EN pin must be supplied with a voltage between DGND + 2V and DGND + 5V. Due to internal clamping mechanism the DGND pin must be connected to valid operating ranges. Figure 7-8 depicts DGND ranges showing DGND valid ranges for three different power supply configuration use cases. If the device is supplied with a dual power supply of ±10V, use case 1, DGND pin can to be connected between −10V and 0V. If the device is supplied with a dual power supply of ±5V, use case 2, DGND pin can to be connected between −5V and 2.3V. For single supply condition of +5V, DGND valid range is between 0V and 2.3V. 2.3V 10V DGND Valid Ranges 5V 0V Figure 7-8. INA151 DGND Valid Ranges If the enable function is not used, connect a 47pF capacitor on EN to DGND. 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. www.ti.com INA151 SLVSIL6C – JANUARY 2026 – REVISED APRIL 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: INA151 |
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