M41T94 datasheet(23/31 Pages) STMICROELECTRONICS

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M41T94

Battery Low Warning

The M41T94 automatically performs battery volt-

age monitoring upon power-up and at factory-pro-

grammed time intervals of approximately 24

hours. The Battery Low (BL) Bit, Bit D4 of Flags

is found to be less than approximately 2.5V. The

BL Bit will remain asserted until completion of bat-

tery replacement and subsequent battery low

monitoring tests, either during the next power-up

sequence or the next scheduled 24-hour interval.

If a battery low is generated during a power-up se-

quence, this indicates that the battery is below ap-

proximately 2.5 volts and may not be able to

maintain data integrity in the SRAM. Data should

be considered suspect and verified as correct. A

fresh battery should be installed.

If a battery low indication is generated during the

24-hour interval check, this indicates that the bat-

tery is near end of life. However, data is not com-

promised due to the fact that a nominal VCC is

supplied. In order to insure data integrity during

subsequent periods of battery back-up mode, the

battery should be replaced. The SNAPHAT top

may be replaced while VCC is applied to the de-

vice.

Note: This will cause the clock to lose time during

the interval the SNAPHAT battery/crystal top is

disconnected.

The M41T94 only monitors the battery when a

nominal VCC is applied to the device. Thus appli-

cations which require extensive durations in the

battery back-up mode should be powered-up peri-

odically (at least once every few months) in order

for this technique to be beneficial. Additionally, if a

battery low is indicated, data integrity should be

verified upon power-up via a checksum or other

technique.

tREC Bit

Bit D7 of Clock Register 04h contains the tREC Bit

(TR). tREC refers to the automatic continuation of

the deselect time after VCC reaches VPFD. This al-

lows for a voltage setting time before WRITEs may

again be performed to the device after a power-

down condition. The tREC Bit will allow the user to

set the length of this deselect time as defined by

Table 14.

Initial Power-on Defaults

Upon initial application of power to the device, the

following register bits are set to a '0' state: Watch-

dog Register, TR, FT, AFE, ABE, and SQWE. The

following bits are set to a '1' state: ST, OUT, and

HT (see Table 15).

Table 14. tREC Definitions

Note: 1. Default Setting

Table 15. Default Values

Note: 1. BMB0-BMB4, RB0, RB1.

2. State of other control bits undefined.

3. UC = Unchanged

tREC Bit (TR)

STOP Bit (ST)

tREC Time

Units

Min

Max

200(1)

2000

µs

Condition

Out

AFE

ABE

SQWE

WATCHDOG

Initial Power-up

(Battery Attach for SNAPHAT)(2)

110

Subsequent Power-up (with

battery back-up)(3)

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