PC0801ARS-F datasheet(44/65 Pages) POWERTIP

44 / 65 page

ST7066U

V2.0

2001/03/01

21/42

" Read Busy Flag and Address

When BF = “High”, indicates that the internal operation is being processed.So during this time the next

instruction cannot be accepted.

The address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR.

After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1.

" Write Data to CGRAM or DDRAM

Write binary 8-bit data to DDRAM/CGRAM.

The selection of RAM from DDRAM, CGRAM, is set by the previous address set instruction

: DDRAM address set, CGRAM address set. RAM set instruction can also determine the AC

direction to RAM.

After write operation, the address is automatically increased/decreased by 1, according to

the entry mode.

" Read Data from CGRAM or DDRAM

Read binary 8-bit data from DDRAM/CGRAM.

The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not

performed before this instruction, the data that read first is invalid, because the direction of AC is not

determined. If you read RAM data several times without RAM address set instruction before read operation,

you can get correct RAM data from the second, but the first data would be incorrect, because there is no time

margin to transfer RAM data.

In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address

set instruction : it also transfer RAM data to output data register. After read operation address counter is

automatically increased/decreased by 1 according to the entry mode. After CGRAM read operation, display

shift may not be executed correctly.

* In case of RAM write operation, after this AC is increased/decreased by 1 like read operation. In this time,

AC indicates the next address position, but you can read only the previous data by read instruction.

Code

DB7

DB6

DB5

DB4

DB1

DB2

DB3

DB0

AC6 AC5 AC4 AC3 AC2

Code

DB7

DB6

DB5

DB4

DB1

DB2

DB3

AC1 AC0

DB0

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