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©2025 Renesas Electronics Corporation

R31DS0040EU0300 December 15,

9DMV0131B/9DMV0141B Datasheet

12

VDD1.8

Power

Power supply, nominally 1.8V.

13

NC

—

No connection.

14

^SEL_A_B#

Input

Input to select differential input clock A or differential input clock B. This input has an internal pull-up

resistor.

0 = Input B selected, 1 = Input A selected.

15

DIF_INA

Input

True input of differential clock.

16

DIF_INA#

Input

Complement input of differential clock.

Table 2. Power Management

OEx# Pin

DIF_IN

DIFx

True O/P

Complementary O/P

0

Running

Running

Running

1

Running

Low

Low

Table 3. Power Connections

Pin Number

Description

VDD

GND

2

1

Input A receiver analog.

3

4

Input B receiver analog.

12

11

DIF outputs,

Table 1. Pin Descriptions (Cont.)

Number

Name

Type

Description