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LM2903H 데이터시트(PDF) 4 Page - STMicroelectronics

부품명 LM2903H
상세설명  Low power dual voltage comparators
PDF  9 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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LM2903H 데이터시트(HTML) 4 Page - STMicroelectronics

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Electrical characteristics
LM2903H
4/9
3
Electrical characteristics
Table 3.
VCC
+ = 5V, V
CC
- = GND, T
amb = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
Vio
Input offset voltage (1)
Tmin ≤ Tamb ≤ Tmax
17
15
mV
Iio
Input offset current
Tmin ≤ Tamb ≤ Tmax
550
150
nA
Iib
Input bias current (2)
Tmin ≤ Tamb ≤ Tmax
25
250
400
nA
AVD
Large signal voltage gain (VCC
+ = 15V,R
L=15kΩ, Vo=1 to 11V)
25
200
V/mV
ICC
Supply current (all comparators)
VCC
+= 5V, no load
VCC
+ = 30V, no load
0.4
1
1
2.5
mA
Vid
Differential input voltage (3)
VCC
+
V
VOL
Low level output voltage (Vid = -1V, Isink = 4mA)
Tmin ≤ Tamb ≤ Tmax
250
400
800
mV
IOH
High level output current (VCC
+ =V
o =30V, Vid = 1V)
Tmin ≤ Tamb ≤ Tmax
0.1
1
nA
µA
Isink
Output sink current (Vid = -1V,Vo = 1.5V)
Tmin ≤ Tamb ≤ Tmax
6
2
16
mA
tre
Small signal response time (4) (RL = 5.1kΩ to VCC
+)1.3
µs
trel
Large signal response time (5)
TTL input (Vref = +1.4 V, RL=5.1kΩ to VCC
+)
Output signal at 50% of final value
Output signal at 95% of final value
500
1
ns
µs
1.
At output switch point, VO ≈ 1.4 V, RS = 0 Ω with VCC
+ from 5 V to 30 V, and over the full input common-mode range (0 V
to VCC
+ –1.5 V).
2.
The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant,
independent of the state of the output, so there is no load charge on the reference of input lines.
3.
Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state.
The low input voltage state must not be less than –0.3 V (or 0.3 V below the negative power supply, if used)
4.
The response time specified is for a 100 mV input step with 5 mV overdrive.
5.
Maximum values are guaranteed by design and evaluation.



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