M50LPW116

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Table 26. Ordering Information Scheme

For a list of available options or for further information on any aspect of this device, please contact the ST

Sales Office nearest to you.

Example:

M50LPW116

N1

T

Device Type

M50

Architecture

LP = Low Pin Count Interface

Operating Voltage

W = 3.0 to 3.6V

Device Function

116 = 16 Mbit (2Mb x8), Boot Block

Package

N = TSOP40: 10 x 20 mm

Temperature Range

1 = 0 to 70 °C

5 = –20 to 85°C

Option

T = Tape & Reel Packing

Table 27. Revision History

Date

Version

Revision Details

September 2001

-01

First Issue

12-Dec-2001

-02

Extensions to the descriptions on Quadruple Byte Programming

16-Jan-2002

-03

Device code announced: 30h

01-Mar-2002

-04

RFU pins must be left disconnected

30-Jul-2002

-05

Quadruple Byte Mode, in LPC mode, removed

22-Nov-2002

5.1

Revision numbering modified: a minor revision will be indicated by incrementing the

digit after the dot, and a major revision, by incrementing the digit before the dot

(revision version 05 equals 5.0). Document promoted to Product Preview.

13-Feb-2003

5.2

Datasheet promoted from Product Preview to Preliminary Data status.