INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRUTH TABLE

INPUTS

OUTPUS

CLEAR

MODE

CLOCK

SERIAL

PARALLEL

QA

QB

QC

QD

S1

S0

LEFT

RIGHT

ABCD

L

X

X

X

X

X

XXXX

L

L

L

L

H

X

X

X

X

XXXX

QA0

QB0

QC0

QD0

H

H

H

X

X

abc

d

a

b

c

d

H

L

H

X

H

XXXX

H

QAn

QBn

QCn

H

L

H

X

L

XXXX

L

QAn

QBn

QCn

H

H

L

H

X

XXXX

QBn

QCn

QDn

H

H

H

L

L

X

XXXX

QBn

QCn

QDn

L

H

L

L

X

X

X

XXXX

QA0

QB0

QC0

QD0

X: Don’t Care

: Don’t Care

a ~ d

: The level of steady state input voltage at input A ~ D respactively

QA0 ~ QD0

: No change

QAn ~ QDn

: The level of QA, QB, QC, respectively, before the mst recent positive transition of the clock.

PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCTION

1

CLEAR

Asynchronous Reset

Input (Active LOW)

2

SR

Serial Data Input (Shift

Right)

3, 4, 5, 6

A to D

Parallel Data Input

7

SL

Serial Data Input (Shift

Left)

9, 10

S0, S1

Mode Control Inputs

11

CLOCK

Clock Input (LOW to

HIGH Edge-triggered)

15, 14, 13, 12

QA to QD

Paralle Outputs

8

GND

Ground (0V)

16

Positive Supply Voltage

IEC LOGIC SYMBOL

M54/M74HC194

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