STA32813TR datasheet(23/57 Pages) STMICROELECTRONICS

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STA328

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6.2

Configuration register B (addr 0x01)

This register configures the serial data interface

The STA328 serial audio input was designed to interface with standard digital audio

components and to accept a number of serial data formats. The STA328 always acts as a

slave when receiving audio input from standard digital audio components. Serial data for two

channels is provided using 3 input pins: left/right clock LRCKI (pin 31), serial clock BICKI

(pin 32), and serial data SDI (pin 30).

SAI[3:0] and SAIFB are used to specify the serial data format. The default format is I2S,

MSB-first. Available formats are shown below in Figure 15 and the tables that follow.

Figure 15.

General serial input and output formats

Table 18 lists the serial audio input formats supported by STA328 when

BICKI = 32 * fs, 48 * fs and 64 * fs, where the sampling rate fs = 32, 44.1, 48, 88.2, 96,

176.4 or 192 kHz.

C2IM

C1IM

DSCKE

SAIFB

SAI3

SAI2

SAI1

SAI0

Table 17.

Serial audio input interface format

Bit

R/W

RST

Name

Description

3:0

0000

SAI[3:0]

Serial audio input interface format: determines the interface

format of the input serial digital audio interface (see below).

SAIFB

Data format:

0: MSB first

1: LSB first

Left Justified

LRCLK

Left

Right

SCLK

SDATA

LSB

MSB

LSB

MSB

LRCLK

Left

Right

SCLK

SDATA

LSB

MSB

LSB

MSB

Right Justified

LRCLK

Left

Right

SCLK

SDATA

LSB

MSB

LSB

MSB

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