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M7020R 데이터시트(PDF) 26 Page - STMicroelectronics

부품명 M7020R
상세설명  32K x 68-bit Entry NETWORK SEARCH ENGINE
PDF  150 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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M7020R 데이터시트(HTML) 26 Page - STMicroelectronics

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M7020R
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The Read Burst Address Register (RBURREG)
These READ burst address register fields must be
programmed before burst READ (see Table 12).
The Write Burst Address Register (WBURREG)
These WRITE burst address register fields must
be programmed before burst WRITE (see Table
13).
The NFA Register
Bit [0] of each 68-bit data entry is a special bit des-
ignated for use in the operation of the LEARN
command. In 68-bit quadrants, the bit[0] indicates
whether a location is full (bit set to ’1’) or empty (bit
set to ’0’). Every WRITE/LEARN command loads
the address of first 68-bit location that contains a
'0' in the entry’s bit[0]. This is stored in the NFA
register (see Table 14). If all the bits in a device are
set to '1,' the M7020R asserts FULO[1:0] to '1.'
In 136-bit-configured quadrants, the LSB of this
register is always set to '0.' The host ASIC must
set bit '0' and Bit 68in a 136-bit word to either '0' or
'1' to indicate full/empty status.
Note: Both bits (0 and 68) must be set to '0' or '1'
(e.g., '10' or '01' settings are invalid).
Table 12. Read Burst Register Description
Table 13. Write Burst Register Description
Table 14. NFA Register
Field
Range
Initial Value
Description
ADR
[14:0]
0
Address. This is the starting address of the data array or mask array
during a burst READ operation. It automatically increments by 1 for
each successive read of the data array or mask array. Once the
operation is complete, the contents of this field must be reinitialized for
the next operation.
[18:15]
Reserved.
BLEN
[27:19]
0
Length of Burst Access. The device is capable of writing from 4 up
to 511 locations in a single burst. The BLEN decrements
automatically. Once the operation is complete, the contents of this
field must be reinitialized for the next operation.
[67:28]
Reserved.
Field
Range
Initial Value
Description
ADR
[14:0]
0
Address. This is the starting address of the data array or mask array
during a burst WRITE operation. It automatically increments by 1 for
each successive write of the data array or mask array. Once the
operation is complete, the contents of this field must be reinitialized for
the next operation.
[18:15]
Reserved.
BLEN
[27:19]
0
Length of Burst Access. The device is capable of writing from 4 up
to 511 locations in a single burst. The BLEN decrements
automatically. Once the operation is complete, the contents of this field
must be reinitialized for the next operation.
[67:28]
Reserved.
Address
67 - 15
14 - 0
60
Reserved
Index



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