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UPC4744G2-AP 데이터시트(PDF) 3 Page - Renesas Technology Corp

부품명 UPC4744G2-AP
상세설명  Single Power Supply, High Speed, Wide Band, Quad Operational Amplifiers
PDF  10 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPC4744G2-AP 데이터시트(HTML) 3 Page - Renesas Technology Corp

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UPC844, UPC4744
R03DS0137EJ0200 Rev.2.00
Page 3 of 10
Feb.14.25
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Power Supply Voltage (V - = GND)
V +
+3
+5 ~ +30
+32
V
Power Supply Voltage (Dual Supply) V ±
±1.5
±16
V
Output Current
IO
±10
mA
Capacitive Load (AV = +1)
CL
1000 Note 6
pF
【
Note】 6. This is the value when feedback resistor (Rf) = 0 Ω.
ELECTRICAL CHARACTERISTICS
(TA = 25 °C, V ± = ±15 V)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Test Condition
Input Offset Voltage
VIO
±2
±6
mV
Input Offset Current
IIO
±6
±75
nA
Input Bias Current Note 7
IB
130
500
nA
Large Signal Voltage Gain
AV
25000
300000
RL ≥ 2 kΩ, VO = ±10 V
Circuit Current Note 8
ICC
7.5
11
mA
IO = 0 A
Common Mode Rejection Ratio CMR
70
86
dB
Supply Voltage Rejection Ratio SVR
70
93
dB
Output Voltage Swing
VOm1
±13.7
+14
V
RL ≥ 10 kΩ
-14.3
VOm2
±13.5
V
RL ≥ 2 kΩ
Common Mode Input Voltage
Range
VICM
V -
V + -1.8
V
Slew Rate
SR
8.5
V/μs
AV = 1 (Rise)
Gain Bandwidth Product
GBW
3.5
MHz
f = 100 kHz
Channel Separation
120
dB
f = 20 Hz ~ 20 kHz
(TA = 25 °C, V + = +5 V, V - = GND)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Test Condition
Input Offset Voltage
VIO
±2
±5
mV
Input Offset Current
IIO
±6
±75
nA
Input Bias Current Note 7
IB
150
500
nA
Large Signal Voltage Gain
AV
25000
300000
RL ≥ 2 kΩ
Circuit Current Note 8
ICC
6
9
mA
IO = 0 A
Common Mode Rejection Ratio CMR
70
80
dB
Supply Voltage Rejection Ratio SVR
70
95
dB
Output Voltage Swing
VOm
3.7
4.0
V
RL ≥ 2 kΩ
(Connected to GND)
0
0
Common Mode Input Voltage
Range
VICM
0
V + -1.8
V
Output Source Current
IO SOURCE
10
30
mA
VIN (+) = +1 V, VIN (-) = 0 V
Output Sink Current
IO SINK
10
30
mA
VIN (+) = 0 V, VIN (-) = +1 V
Slew Rate
SR
7
V/μs
AV = 1 (Rise)
【
Note】 7. The current flow direction of the input bias is out from the IC because the first stage of the IC composed
of PNP transistor.
8. Current flowing through the internal circuit. This current flow regardless of the channel used.



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