EM78F651NAPSSLASHNAPJ datasheet(44/58 Pages) EMC

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EM78F651N

8-Bit Microcontroller

•

Product Specification (V1.1) 10.20.2006

(This specification is subject to change without further notice)

Word 0

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ENWDTB

OSC2

OSC1

OSC0

PR2

PR1

PR0

Bit 12: Not used, set to “0” at all time.

Bit 11 (NRHL): Noise rejection high/low pulse define bit. INT pin is falling edge

trigger.

1 : Pulses equal to 8/fc [s] is regarded as signal

0 : Pulses equal to 32/fc [s] is regarded as signal (default)

NOTE

The noise rejection function is turned off in the LXT2 and sleep mode.

Bit 10 (NRE): Noise rejection enable (depend on EM78F651N). INT pin is falling

edge trigger.

1 : disable noise rejection

0 : enable noise rejection (default) but in Low Crystal oscillator (LXT)

mode, the noise rejection circuit is always disabled

Bit 9 (CYES): Instruction cycle selection bit

1 : one instruction cycle (default)

0 : two instruction cycles

Bit 8~7 (CLKS1 and CLKS0): Instruction period option bit

Instruction Period

CLKS1

CLKS0

4 clocks

2 clocks

8 clocks

16 clocks

Refer to the section on Instruction Set.

Bit 6 (ENWDTB): Watchdog timer enable bit

1 : Enable

0 : Disable

Bits 5~3 (OSC2 ~ OSC0): Oscillator Mode Selection bits

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