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M68AW127 데이터시트(PDF) 10 Page - STMicroelectronics

부품명 M68AW127
상세설명  1Mbit 128K x8, 3.0V Asynchronous SRAM
PDF  20 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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M68AW127 데이터시트(HTML) 10 Page - STMicroelectronics

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M68AW127B
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Table 7. Read and Standby Mode AC Characteristics
Note: 1. Test conditions assume transition timing reference level = 0.3VCC or 0.7VCC.
2. At any given temperature and voltage condition, tGHQZ is less than tGLQX and tEHQZ is less than tELQX for any given device.
3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
4. Tested initially and after any design or process changes that may affect these parameters.
Symbol
Parameter
M68AW127B
Unit
70
100
tAVAV
Read Cycle Time
Min
70
100
ns
tAVQV
Address Valid to Output Valid
Max
70
100
ns
tAXQX
(1)
Data hold from address change
Min
5
15
ns
tEHQZ
(2,3)
Chip Enable High to Output Hi-Z
Max
25
30
ns
tELQV
Chip Enable Low to Output Valid
Max
70
100
ns
tELQX
(1)
Chip Enable Low to Output Transition
Min
5
10
ns
tGHQZ
(2,3)
Output Enable High to Output Hi-Z
Max
25
30
ns
tGLQV
Output Enable Low to Output Valid
Max
35
50
ns
tGLQX
(2)
Output Enable Low to Output Transition
Min
5
5
ns
tPD
(4)
Chip Enable or UB/LB High to Power Down
Max
0
0
ns
tPU
(4)
Chip Enable or UB/LB Low to Power Up
Min
70
100
ns



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