AS3689 datasheet(60/72 Pages) AMSOSRAM

60 / 72 page

AS3689

austriami crosyst ems

Datasheet, Confidential

www.austriamicrosystems.com (mlg, ptr)

Revision 1.0.2 / 20070115

58 - 70

Figure 35 – Serial Interface Random Read

A Sr

data

N P

Read Register

WA++

AS3689 (= slave) receives data

AS3689 (= slave) transmits data

Random Read and Sequential Read are combined formats. The repeated START condition is used to change the

direction after the data transfer from the master.

The word address transfer is initiated with a START condition issued by the master while the bus is idle. The

START condition is followed by the device-write address and the word address.

In order to change the data direction a repeated START condition is issued on the 1st CLK pulse after the

ACKNOWLEDGE bit of the word address transfer. After the reception of the device-read address, the slave

becomes the transmitter. In this state the slave transmits register data located by the previous received word

address vector. The master responds to the data byte with a NOT ACKNOWLEDGE, and issues a STOP

condition on the bus.

Figure 36 – Serial Interface Sequential Read

A Sr

data 1

data 2

AS3689 (= slave) receives data

AS3689 (= slave) transmits data

...

data n

N P

Read Register

WA++

Sequential Read is the extended form of Random Read, as multiple register-data bytes are subsequently

transferred.

In contrast to the Random Read, in a sequential read the transferred register-data bytes are responded by an

acknowledge from the master. The number of data bytes transferred in one sequence is unlimited (consider the

behavior of the word-address counter). To terminate the transmission the master has to send a NOT

ACKNOWLEDGE following the last data byte and subsequently generate the STOP condition.

Figure 37 – Serial Interface Current Address Read

data 1

data 2

…

data n

N P

Read Register

WA++

Read Register

WA++

Read Register

WA++

Read Register

WA++

AS3689 (= slave) receives data

AS3689 (= slave) transmits data

To keep the access time as small as possible, this format allows a read access without the word address transfer

in advance to the data transfer. The bus is idle and the master issues a START condition followed by the Device-

Read address.

Analogous to Random Read, a single byte transfer is terminated with a NOT ACKNOWLEDGE after the 1st

data bytes must be responded to with an ACKNOWLEDGE from the master.

For termination of the transmission the master sends a NOT ACKNOWLEDGE following the last data byte and a

subsequent STOP condition.

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