AS3953A-BDFM datasheet(17/71 Pages) AMSOSRAM

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[v1-05] 2019-Feb-15

AS3953A − Detailed Description

Support of ISO 14443A Level-4

ISO 14443A-4 commands RATS, PPS and DESELECT are

implemented in the PICC Logic. RATS and PPS define

communication parameters, which are going to be used in the

following data exchange by using the block transmission

protocol. The advantage of implementing PPS that defines the

bit rate used for communication, is that all bit rate issues are

handled by the PICC Logic. The MCU gets the information about

the actual receive and transmit bit rate by reading a dedicated

display register. It has to be fast enough to serve receive and

transmit at the maximum bit rate.

Execution of the block transmission protocol is left to the

controller. In case of receiving the block data from the PCD the

PICC Logic provides support by detecting and removing start

bit, stop bit, parity bits and CRC. Parity bits and CRC are also

checked. When the block data is sent to the PCD the PICC Logic

calculates and inserts start bit, parity bits, CRC and stop bit.

DESELECT puts the PICC Logic in HALT state. An interrupt is sent

to controller upon reception of DESELECT command to inform

it that PCD stopped the Level-4 communication.

Additionally to supporting the ISO14443-4 transmitting

protocol the PICC Logic accepts also proprietary commands.

Proprietary commands are identified by setting the two MSB

bits of first transmitted byte to ‘01’ (This combination is not

used by ISO 14443A Level-4 protocol).

The following custom commands are implemented:

• Wake-up: Sends a wake-up interrupt to controller

• Read EEPROM: Reads data from EEPROM

• Write EEPROM: Writes data to EEPROM

Support of ISO 14443A Optional Features

• CID is supported

• NAD is not supported

• Historical bytes are not supported

• Power level indication is not supported

AS3953A-BDFM 데이터시트(PDF) 17 Page - ams-OSRAM AG