AS7038RB datasheet(111/127 Pages) AMSOSRAM

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AS7038RB

Functional Description

Datasheet

• PUBLIC

DS000726

• v2-00 • 2021-Jun-02

126

│ 110

I²C Sequential Read: Shows the format of an I²C sequential read access

Sequential Read is the extended form of Random Read, as more than one register-data bytes are

transferred subsequently. In difference to the Random Read, for a sequential read the transferred

transferred in one sequence is unlimited (consider the behavior of the word-address counter). To

terminate the transmission the master has to send a not-acknowledge following the last data byte and

generate the STOP condition subsequently.

Figure 151:

I²C Current Address Read

I²C Current Address Read: Shows the format of an I²C current address read access.

To keep the access time as small as possible, this format allows a read access without the word

address transfer in advance to the data transfer. The bus is idle and the master issues a START

condition followed by the Device-Read address. Analogous to Random Read, a single byte transfer is

terminated with a not-acknowledge after the 1st register byte. Analogous to Sequential Read an

unlimited number of data bytes can be transferred, where the data bytes has to be responded with an

acknowledge from the master. For termination of the transmission the master sends a not-

acknowledge following the last data byte and a subsequent STOP condition.

CONTROL (Address 0x00)

Figure 152:

CONTROL Register

Addr: 0x00

CONTROL

Bit

Bit Name

Default

Access

Bit Description

7:5

Not used

hs_en

Enable I2C high speed

Not used

clk_def

Set the internal system frequency

Programming is only possible if oscillator is

be disable

0:2 MHz.

1:1 MHz

read register

WA++

data

WA++

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