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OPA620DBVR 데이터시트(PDF) 23 Page - Texas Instruments |
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OPA620DBVR 데이터시트(HTML) 23 Page - Texas Instruments |
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23 / 34 page ![]() 9.4.2 Layout Example CF RIN Output Ground Ground Positive Power Supply Use Low-ESR, ceramic bypass capacitors Place 100nF capacitor close to the device Place close to the device to reduce parasitic capacitance Place close to the device to reduce parasitic capacitance Input V+ V– –IN +IN OUT 1 2 3 4 5 Ground 1 F 100nF RG RF Ground Ground and power plane exist on inner layers. Ground and power plane removed from inner layers. Ground fill on outer layers also removed. Figure 9-6. Operational Amplifier Board Layout for Noninverting Configuration www.ti.com OPA620, OPA2620 SLOSEG2A – APRIL 2026 – REVISED JUNE 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: OPA620 OPA2620 |
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